[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
RE: Generation of RST# at System Power Down
In PCs/servers, RST# to PCI slots/devices are usually generated off the
power supply's PWROK signal. Upon power-down, power supply deasserts its
PWROK signal before the rails go out of spec. Where such a signal isn't
available, power supply monitor ICs (MAX823-like parts) can be used to
generate PWROK/RST# signals.
From: Joseph Brcich [mailto:email@example.com]
Sent: Thursday, November 14, 2002 11:56 AM
To: Douglas J. Clark; firstname.lastname@example.org
Subject: RE: Generation of RST# at System Power Down
We used a LTC1536 on our system board. It monitors the supplies and
From: Douglas J. Clark [mailto:email@example.com]
Sent: Thursday, November 14, 2002 9:12 AM
Subject: Generation of RST# at System Power Down
I'd like to know the typical methods for generation of the PCI signal
especially at the time a system is powered down. Section 4.3.2 of the
Rev. 2.2 spec says that RST# must go active within 500 ns of the power
going out of specification. Is monitoring of the power rail and the
generation of the RST# signal typically performed by the power supply,
by components on the motherboard? Is it done differently for CompactPCI?
Do typical desktop PCs really meet the 500 ns requirement? Can PCI
buffers be damaged if RST# takes longer to become active at power-down?