PCI-X write command optimizations

["Yuval Avnon" <yuvala@galileo.co.il> (by way of Daniel Weaver <dan.weaver@znyx.com>)]

Hi,

PCI-X master is allowed to generate a burst write of sequential 
data with Block Write or Memory Write commands.

Do PCI-X chip sets or bridges when act as targets, make some
optimization based on the type of the write command ? If yes, 
can you give me a pointer to such devices ?
Please reply  to <mailto:gidi@galileo.co.il>gidi@galileo.co.il

Thanks,

--
Gidi Bratman
Galileo Technology - a Marvell company

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Yuval Avnon - Product Definition
Galileo - Marvell
Email: <mailto:yuvala@galileo.co.il>yuvala@galileo.co.il
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