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PCI-Express PHY Implementors



I am implementing a 16-lane PCI-Express LINK, PHY
and SERDES core looking for feedback on the newest
PCI-Express Base Specification Rev 1.0, July 22, 2002
from other implementors of the Clause 4 Physical Layer.

I am currently getting good response within the Intel
Developers Network for the PCI-Express General Forum,
but am looking for contacts within the PCI-SIG standards
body.

If a better email reflector exists, let me know.

Please contact me at curtr@lsil.com

Thanks - Curt

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