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i21554 indirect configuration cycles



Hi  all,
	I am trying to get configuration cycles to work through an intel 21554
non-transparent bridge.  I am not having very much luck so far. 
Everything else works great.  I configured the Configuration Status and
Control register (CSR offset 0x12) to allow downstream and upstream
cycles (value 0x0202).  But when I place anything in the config address
register and then read/write the config data register, nothing happens
on the remote side.  I can see that the bridge doesnt even arbitrate for
the bus.  It just returns a failure.

I cant seem to find anything else in the manual that looks like it needs
to be configured before this is supposed to work.  As a sanity check, I
write to an address that the bridge is configured to translate and
forward, and I can see this on the other side just fine.  Its only the
config cycles that seem to have a problem.

Any suggestions would be appreciated!

-Greg Haskins

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