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Re: Deterministic transactions from the local bus side



Hi,
 
arbitration priority does not depend on the operating system used, but on the PCI arbiter. The PCI spec does not mandate a detailed arbitration scheme, just a recommendation that it has to be a "fair arbitration". Thus, each PC chipset uses a different scheme. So, arbitration latency may vary from PC to PC. There's no way to give your hardware the highest priority. You may use the latency timer of your PCI hardware to assign a guaranteed bus bandwidth to your hardware, but thie is limited to 256 clock cycles. There are Embedded Solutions which do not adhere to the latency timer, i.e. once they have arbitrated the bus they use it as long as they have to transfer data. This violates the PCI spec, but in embedded, high data rate applications this may be the only way out. Check out the QL5064 by QuickLogic.
 
On the other hand, doing bus master DMA usually involves some from of DMA controller (e.g. the DMA engine in the 9656) and, usually, you have to deal with the Memory management unit of the Operating System to allocate buffers (note that contiguos physical memory may not be contiguos in the virtual address space and vice versa, especially for larger buffers). This is not deterministic, like everything in Windows. Windows OSes are general purpose OSes, not Real Time OSes.
Next, doing DMA, you will also use interrupts at the end of the DMA to signal to the host. Effects you have to consider:
    - PCI bus interrupt latency (not so bad)
    - Interrupt sharing (probably more than one PCI device use the same interrupt)
    - Interrupt latency in the OS.
 
Moreover, you won't have 4GB of host memory on a machine. 4GB is the overall address space of 32bit processors including peripherals devices like PCI. The largets memory I've seen is 2GB on a machine.
 
Sounds like a very interesting and tough application.
 
regards,
 
 
Peter Marek
General Director
MarekMicro GmbH
tel.: 049-9621-9732-110
fax: 049-9621-9732-199
www.marekmicro.de
----- Original Message -----
Sent: Thursday, December 05, 2002 5:12 PM
Subject: Deterministic transactions from the local bus side

We are considering using multiple PLX PCI 9656s to link many rackmount PCs to a kind of image mixer.

Each PC host CPU running a standard image processing application on Windows 2000 or XP will fill a big image buffer up to 4 GBytes in the host memory. Then a real time subsystem running on the local bus side of the 9656 will set up requests to read data from that buffer.

Our wondering is about the fact that the reading has to be done in a deterministic manner, thus eliminating the need of big elastic buffer. When there is a request to read a given part of that buffer (ex: a  line of 2Kbytes), it has to be delivered immediately with almost no latency . I understand that the 9656 may be set up as a master, but what about its priority. I do not know enough about Windows 2000 or XP to see if there is a way to to give the absolute priority to the 9656. I would like to stay with Windows 2000 or XP instead of a real time OS  in order to be able to use standard image processing appplications.

Is it possible to set up the arbitration to give absolute priority to the 9656 ?

Thanks,

Yves Chartier, Eng.
Epsimage Inc.
T 450.974.9109
F 450.974.3628