Re: Deterministic transactions from the local bus side

[Martijn Emons <martijn.emons@arcobel.nl>]

Hi Yves,

Sorry for trashing your party but here's the blund anwser:
* nothing involving  Windows-OS is 'deterministic'
* nothing involving a PCI-bus with multiple-masters (ie. multiple 9656) 
is 'determistic'.

The answer lies in 'determinstic-enough'.
We have designed PCI-card that uses PCI-master write/reads, the driver 
supports multiple cards for
  image processing
Our experiences:
* A normal Windows/PC-system using multiple boards can handle more than 
2000 interrupts easily.
* tweaking the master-latency timer values has some effects when the 
BIOS uses these values.
   It's better to read the BIOS-manuals of some PC to get a grip of what 
the BIOS supports via the
    normal BIOS-settings and/or what you can tweak using editors like 
WPCEDIT (search the internet).
* I can not imagine that your PCI-card will have no buffer-capability 
whatsoever. So.... calculate:

   Latency in your 'determinstic-reads' => the number of 9656-masters X 
(burst-size/PCI-speed).

   For MS-Windows, the scatter-gather entries in the kernel-mode driver 
are 4kbyte max in combination
   with a normal PCI-bus performance (say 100 Mbyte/sec sustained ) this 
will take 40 us to be transfered.
   A PC-system with, say five, 9656-masters means that it will take 5 x 
40 => 200 us delay
   before every card will get the opportunity to receive (and process) 
4kbyte of data.
   A normal bit of pixel-processing on 4kbyte of pixel data will take 
roughly 80 us on a high-speed DSP/CPU
   (all depending on algoritm ofcourse), but image-mixing falls in this 
ball-park figure.
   
  Is this 'deteriminstic enough' for you? Only you can answer this question.
   
   

-- 

Kind regards, Martijn Emons

- Designer Consultant -
Arcobel ASIC Design Centre B.V. 
Hambakenwetering 1
5231 DD 's-Hertogenbosch, 
The Netherlands.
tel.:  +31 73 64 60 100 
fax :  +31 73 64 60 115 


Yves Chartier wrote:

> We are considering using multiple PLX PCI 9656s to link many rackmount 
> PCs to a kind of image mixer.
>
> Each PC host CPU running a standard image processing application on 
> Windows 2000 or XP will fill a big image buffer up to 4 GBytes in the 
> host memory. Then a real time subsystem running on the local bus side 
> of the 9656 will set up requests to read data from that buffer.
>
> Our wondering is about the fact that the reading has to be done in a 
> *deterministic* manner, thus eliminating the need of big elastic 
> buffer. When there is a request to read a given part of that buffer 
> (ex: a  line of 2Kbytes), it has to be delivered immediately with 
> almost no latency . I understand that the 9656 may be set up as a 
> master, but what about its priority. I do not know enough about 
> Windows 2000 or XP to see if there is a way to to give the absolute 
> priority to the 9656. I would like to stay with Windows 2000 or XP 
> instead of a real time OS  in order to be able to use standard image 
> processing appplications.
>
> Is it possible to set up the arbitration to give absolute priority to 
> the 9656 ?
>
> Thanks,
>
> Yves Chartier, Eng.
> Epsimage Inc.
> T 450.974.9109
> F 450.974.3628
>




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