PCI Power Management

[bhanupratap bandaluppi <bhanupratap_b@yahoo.com>]

Hi all,
       We want to implement PCI Power Management
Option in our PCI Target core. I want to know what are
all required to implement PM. 
1.what is the difference between D3hot and D3cold
2.Need additional Interface signals PME# and 3.3Vaux.
DO we need any other signals
3. In the PCI config space, we need to enable the PCI
status register and also capability pointer. Do we
need to take care of any other registers in
configuration space?
4. Regarding Data register, do we need to implement
data register? What are the conditions on which we
require data register?
5. when do we require 3.3Vaux?
6. what power states do we need to implement?

Thanks in advance for reply
Bhanu


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