No Subject

[adeel.ahmad@st.com]

hello,

i have a small question regarding the Tval test loads used in PCI Timing
parameter measurement.
i have read about the reasons for choosing the specific load values used
for measuring rising/falling Tvals (eg.-using the 25ohms and 10pF) on
this mailing list, however i am don't know about -
1)the significance of "1/2 in. max" trace that is shown at the output pin
of Output buffer and 
2)as to where the load(25ohms+10pF) is attached with respect to the "1/2
in. trace"- at the pin or the test point?
3) how necessary it is to use this trace for Tval measurement while
designing a PCI driver?

A simple drawing for ready reference is provided for max Tval rising edge
test load-

	|*
	|  *  	PIN	1/2 in. max (??)    test point	
     ---|    *##----------------------------##
	|  *         |           |
	|*           >	  	 |
	o/p          < 25ohms  ------    	
	buffer 	     >         ------ 10pF
	   	     <		 |
	     	     |	gnd	 |
	      	      ------------	
Hope to get some enlightment regarding the queries.

thanks & regards
ADEEL