RE: simple question on Tval test load

[adeel.ahmad@st.com]

hello Andrew!

thanks for clearing my doubt regarding the Tval test load.
having gone through your reply and other past replies of yours on the
same subject in this mailing list have helped me answer a number of
questions that came to my mind when i first read the PCI specs.

i will definitely trouble you again when i have doubts.

thanks and regards
ADEEL




> Adeel,
> 
> (1)  The reason for the half-inch-max trace is that this is also meant
> to be a physical test load that an IC manufacturer would use when
> testing their chips for compliance with the Spec.  It is allowing you
> to attach up to one-half-inch of trace to the "DUT's" output pin.
> 
> (2)  I don't think they considered where the resistor and capacitor
> should be attached along the half-inch trace.  At the speeds
> necessary for 33MHz PCI, it shouldn't make a big difference.
> 
> (3)  Whether you have zero inches, or a half inch, again it
> shouldn't make much difference.  The Spec is saying that you
> can have any length between zero and 0.5 inches (12.7mm).
> 
> Regards,
> Andy
> 
> 
>