Subordinate Bus Number register in Host/PCI Bridges

["Bravo H" <bravohan@hotmail.com>]

Hi,

Since Host/PCI Bridges use Header Type Zero, my question is where in the 
configuration space of the Host/PCI Bridge the Subordinate Bus Number 
register is implemented. Also, how does Host/PCI Bridge filter memory and/or 
IO transactions?

Best Regards,

Bravo




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