Single Data phase disconnection rules... PCI-X 2.0

[Varinder Sogi <varinder.sogi@dcmtech.co.in>]

Hi Experts !!

	In PCI-X 2.0 in the section "2.11.2.1 Single Data Phase Disconnect (page 
149)", it says .....

"Target must be designed never to signal both Single Data Phase Disconnect 
and Data Transfer for memory write transactions that begin four or less data 
phases before any single ADB, unless the target verifies that the byte count 
is small enough not to include that ADB"

Could you please explain the reason behind this..


Thanks and Regards,
Varinder