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- RE: expanding the # of pci slots, (continued)
- ASIC thermal constraints/guidelines,
Kayfes, Paul
- PCI write transaction,
Cazzatello Gaetano
- "......." disappears.,
Takashi Nakamura
- ALi's USB uses other than INTA#.,
Takashi Nakamura
- PCI Addressing Conventions,
Steve Stolper
- PII NT <-> AMCC S5933 Problem,
Tobias Stumber
- AW: a PCI based data acquisition card,
Lange, Michael
- about 64 bit card plugged into a 32 bit pci slot,
sun zhi-gang
- about 64bit pci signals,
sun zhi-gang
- FW: A help required!!!!!,
Ali Najafi - Azfin
- Improved PCI SIG Newsletter,
Richard Baek
- list server is SLOW?,
John R Pierce
- a PCI based data acquisition card,
- querries on PCI,
ECIL VLSO DESIGN CENTRE ECIL HYDERABAD
- Looking for a PCI-IDE interface controller,
ASHLEY_OSHIRO
- about rst# signal,
sun zhi-gang
- Trace length for Interrupt lines,
Tai Phan
- DMA function,
Moonima Kibria
- Q: Electrical specs. for PMC modules,
Daniel Roganti
- Q: BUSMODE siganls in PMC spec IEEE P1386.1/Draft 2.0,
Daniel Roganti
- Missing PWR/GND pins?,
Carl Jackson
- ISA Spec,
Brandon Frazier
- status register bit 15 "detected parity error" for SERR?,
Neal Palmer
- help for unix driver,
zhao xikai
- PCI Windows and NT driver,
K Kibria
- RE: Altera Target Abort "undocumented feature" or "bug"?,
Ali Najafi - Azfin
- _/_/FREE: Rapid Fire Mail Server+Stealth Mass Mailer_/_/,
T
- Embedded Single Board Computer card comes with unique ‘Peripherals Library’ ,
Alexander Didebulidze
- COMPULAB INTRODUCES A NEW SERIES OF EMBEDDED SBC CARDS WITH PCI AND ETHERNET,
Alexander Didebulidze
- RE: CPCI 6U Max Wattage,
Brooks Lame
- re: about 21554 bridge,
Alan Deikman
- RE: who drives RST signal in PCI?,
Andrew Ingraham
- Memory Write Invalidate performance gains?,
Neal Palmer
- pci to pci bridge in NT4.0,
vision
- BAR set to 0 - all the bits have to be 0, right?,
mek
- what is put in Vendor ID and Device ID?,
Mark Galecki
- PCI Card Clock Trace Length,
Frank Walker
- PCI Request,
PGNICK
- AW: PCI signal integrity,
Lange, Michael
- PCI signal integrity problem on passive PCI backplanes,
Lange, Michael
- ISA Retainer,
Neil Watkinson
- Universal PCI signaling,
John Hutchins
- PMC BUSMODE#1,
Tai Phan
- PCI-to-PCI Bridge Architecture Specification Announcement,
Comins, Todd
- PCI version compatibility and video card question,
David Schneider
- [Fwd: Message Signaled Interrupts],
Jim Freeman
- rev 2.1 base classes and sub classes,
Chris Roussel
- ANNOUNCE: A new logic simulation library with PCI models,
Udi Finkelstein
- Questions about PCI-X FAQ,
Eric Rehm
- PCI 2.1, Fig 4-5 and notes for Table 4-6,
Ruchi_Wadhawan
- Embedded PCI market data,
Kent Dahlgren
- PCI SIG News Flash,
Richard Baek
- Galileo GT 64011 + PC BIOS Extension,
Finichiu György
- Pullup Resistor Values in PCI 2.1 Spec,
O'Shea, David J
- PCI Config. Utility,
Yousef Vazir
- PCI-X,
Richard Baek
- <Possible follow-ups>
- PCI-X,
Michael_Kharkover
- RE: PCI-X,
KC Chang (by way of Daniel Weaver <dan.weaver@znyx.com>)
- PCI-X,
Ramesh Reddy
- 3.3V Device driving a 5V Bus,
Andrew Stone
- AMCC pass through problem??,
Tom Stamp
- Taiwan PCI Compliance Workshop and Conference,
Richard Baek
- More details : *New* PCI bus standard,
Sriram Ramamurthy
- MiniPCI,
Isaac Livny
- Re: pci extensions (was: *New* PCI bus standard?),
Alan Deikman
- PC with a 64-bit 33MHz slot??,
Ed Romascan
- RE: Capacitors on Power Pins - a nit,
Andrew Ingraham
- pci extensions,
Darrel Peterson
- Bus Clock Speed,
Richard Collins - reDSP
- Capacitors and VIO clamp,
William Benner
- Capacitors on Power Pins,
William Benner
- PCI card on other side of bridge,
richards
- no PCIRST# !!! on IBM 340 with SiS computers ???,
Yaron Haviv
- what is pci mezzanine card?,
zgsun@nudt.edu.cn
- pci bus coprocessors,
David Feustel
- *New* PCI bus standard?,
Alan Deikman
- RE: Mailing list 'Reply-To' header, anon submissions,
Brooks Lame
- 3.3V / 5V PCI,
William Benner
- 3.3V / 5V PCI Question,
William Benner
- Demand mode DMA on the 960RP,
471034N
- Responsibilty for enabling bus master enable bit?,
Richard Walter
- pci bus latency,
Joe Hanes
- 64-bit PCI bus,
Ganesan Viswanathan
- 3.3V PCI PC's for Test,
Quinn_Kunz
- PCI add-in card: BIOS and driver questions,
Daniele Pinto
- Unknown PCI signal PCI_PME, HELP !!!,
Olivier Auberson
- Re: Max retry ECR (fwd),
Russ Herrell
- Stop during snoop,
Anders Enggaard
- PCI training hardware,
eng267
- Re: Max retry ECR,
br
- CRYSTAL OSCILLATORS,
hankyungtelecom
- RE: basic doubts in PCI (re-send),
Andrew Ingraham
- Does this chip exist?,
Eric Goodill
- Supply/ground pads for PCI I/Os,
Chris Tann
- basic doubts in PCI,
HEAD/TSD
- Method for Partial Configuration (Was: Re[2]: BAR value of zero?),
Richard Walter
- [Q]Win-NT PCI Driver Book?,
ÀåÁØ¿µ
- BIOS and Clocks,
Terje Melsom, VMETRO
- Tval Measurement,
Adam Chen
- PCI-to-HOTLink Card,
Yazbek, Dan
- Re: PCI-ISA Adaptor,
Mike Salameh
- BAR value of zero?,
Erin Hunter
- PMC 66 MHz EN,
Tai Phan
- off the shelf PCI chips,
Gary Kidwell
- P2P and Windows NT,
Benoit Lemieux
- PCI 2.2 Draft,
Gary Wu
- IDSEL with Config type 1,
Tai Phan
- PCI carrier board for PMC,
Gordon Brown
- Roadmapper under C.1,
Kaufman, Roger
- Processors and technology for PCI applications,
imshq
- [Re: target termination],
Michael Tresidder
- PCI Load Question,
Todd Harrington
- BE/LE,
Philip Ronzone
- When SERR# should be deasserted?,
Takashi Nakamura
- target termination,
Michael Tresidder
- Hardware .vs. software?,
Philip Ronzone
- Query..,
Dennis Healy
- Technical Information,
ERNESTO POISOT ORTIZ
- BE & LE hardware help,
Philip Ronzone
- Good design recognition,
Philip Ronzone
- Bus parking protocols for Intel bridge chip sets,
Mark Valley
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