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- Re: PMC and mezzanine cards, (continued)
- Seeking Intel i960RP opinions/experiences,
Adam Barnes
- AMCC PCI Developer Kit,
John A. Harding
- Altera PCI I/F Implemenations,
BOB4PCI
- PCI and Altera's FPGA,
Pablo AGHEMO
- RE: Auxiliary power support for PCI,
Tony Goodfellow
- Archiving reflector traffic,
Richard Baek
- PCI prototyping boards,
John A. Harding
- A software question,
suguna
- PME# enabled motherboard update,
Alan Yee
- Series Termination,
Brian Hunter
- PCI Hot-Plug Specification Draft 0.9 available,
Alan Deikman
- Bounce messages when you post,
Alan Deikman
- Delayed transactions and LOCK#,
Thomas Dippon
- Strange failure with PLX9060ES,
David Griffin
- re: HP / Future Plus,
CSimpson
- Development Tools,
Buck, Arnie
- Flexible or right angle test connector?,
Alan Yee
- Device/Vendor IDs,
Scott D. Davilla
- update: bare backplane,
John Lipsius
- S-MOS/Epson Adds Intellectual Property of USB Cores from NetChip,
Normal Carpenter
- PCI 2.2,
Alan Deikman
- PCI Bus Add on card,
Inside Technology
- Transaction ordering,
pavel.peleska
- PCI chipset Arbiter info,
David Kemper
- PCI Proto Board,
Giridaran Amarakone
- SCSI Controller Question,
Cobra
- Single Chip PCI HDLC Controller,
Bob Huebner
- Re: Host bridge config (Galileo),
Mitch Kahn
- bare backplane avail?,
John Lipsius
- PC system memory and PCI masters,
Udi Finkelstein
- AMCC 5933 help needed,
Mark D. Schilling
- BUSMODE# logic and DEC 21152,
Magnus Homann
- Vendor ID,
Wilson Leung
- Host Bridge BIOS configuration (or lack of!),
Paul Slade
- PME# enabled motherboards?,
Alan Yee
- Target Initial Latency: How to count clocks?,
pavel.peleska
- Undeliverable Message,
ms
- contact for SILICON INTEGRATED SYSTEM (vendorID = 1039),
Peter Johnston
- USB Device Controller,
Tony Murray
- 3.3V system,
Claude Robitaille
- Bus Arbiter from PLD,
HERDAN, EDIE NR:4124
- Question about PCI,
Pablo AGHEMO
- 3v3 signaling, noise margin and universal card.,
Thierry Basset
- Chip Conflict ?,
BOB4PCI
- PPro chip sets,
Herve Suquet
- Claiming 1M when using 8K,
Bob Huebner
- BIOS Behavior Under PCI 2.1 Spec.,
YVazir
- Re: 64MB MUCH slower then 32 or 40MB Ram (all windows 95 incarnations),
Bernd Lehahn
- PCI slave single board computers,
David Kemper
- Present Signals,
Jeff Dahlin
- Address decoding,
Mr Steve Joures
- re: <none>,
YVazir
- Request/Grant Tuning,
pavel.peleska
- Auxiliary power support,
Tad Ball
- YMMV - Sustained transfer rates on Intel 430VX motherboard,
Bob Sugar
- PCI to PCI Dec Bridge specification,
Guy Bonneau
- PICMG,
Noam Efrati
- <Possible follow-ups>
- RE: PICMG,
Dunlap, Randy
- PM7375 behind a 21050,
Michel AUBERT
- Question: Noise margin in 3V3 signaling ?,
Thierry Basset
- FW: HOT Plug and Expansion ROMs,
Tony Goodfellow
- Re: How 'fast' can you issue PCI BIOS calls?,
Dave New
- Attn: Microsoft. WDM (Win32 Driver Model) Level 3 -- how do I get it ?,
Erik Gustav
- video behind a bridge,
Cobra
- Re: Vary PCI clock,
Isaac Livny
- Re: Bounce from 5V to 3.3V signal switching,
Andy Ingraham
- WDM (Win32 Driver Model) Level 3 -- how do I get it ?,
Jorn Ludwig
- Universal Adapters,
Irv Negrin
- Bounce from 5V to 3.3V sign,
Tom Wilson
- Market Information,
Anton Rudorfer
- 'Old PPB' and 3.3.V signaling compatibility,
Vincent CHUFFART
- Floating 64bit extension signals on a parked bus,
Thomas R. Hotchkiss
- REQ# deassertion,
Scott RoLanD
- invalid byte enables,
Eddie Chan
- A Config question,
Jim Holeman
- PCI Hot-Plug Specification,
Warren Questo
- PCI cards w/ LOCK support,
Cheryl A Kiyama
- Latency timer,
Rafi Boneh
- Latency Timer.,
Rafi Boneh
- 64 bit systems,
Royce Stanton
- BIOS POST, nested bridges and PhoenixBIOS,
Stephen Williams
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SmileySmak
- <Possible follow-ups>
- subscribe,
Yip Mann Fai
- Re: subscribe,
pci-sig-request
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Tony Goodfellow
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