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PCI Express^® Compliance Test Library

PCI Express Electrical Testing	PCIe 1.0a and 1.1	PCIe 2.0
PCI Express Configuration Testing	PCIe 1.0a and 1.1	PCIe 2.0
PCI Express Protocol Testing	PCIe 1.0a and 1.1	PCIe 2.0
PCI Express Platform BIOS Testing	PCIe 1.0a and 1.1	PCIe 2.0 (FYI)
PCI Express Test Source Code		PCIe 2.0

PCI Express Electrical Testing

The PCI Express Electrical tests were developed to help verify product compliance to the PCI Express Base Specification(s).

PCI Express 1.0a and 1.1 (Released)

PCI Express Electrical Test Consideration:

This document provides valuable information for testing electrical signaling of root complex, switch, bridge, end point, add-in peripheral and base board components. Updated 2/9/2007.

PCI Express 1.1 Electrical Test Procedures:

Detailed procedures on how to perform the electrical tests, including scope hookup details. There are currently procedures for an:

Agilent Infiniium 54855A scope, with SIGtest version 2.1
LeCroy SDA 6000 scope, with SIGtest version 2.1
Tektronix Real Time Oscilloscopes, with SIGtest version 2.1

PCI Express Electrical Test Software SIGtest version 2.1: Software package that analyzes the captured data. Software runs on Windows XP*.
(FYI Only) PCI Express Clock Phase Jitter Test Software: ClockTool version 1.3:

Software package that analyzes captured reference clock data to PCI Express 1.1 CEM specification or the PCI Express Base 2.0 specification. Software runs on Windows XP*

PCI Express Electrical Test Fixtures:

PLL Loop Bandwidth Testing:

The PCI-SIG offers PLL Loop Bandwidth and peaking testing as FYI data for 1.0a/1.1 devices. The PCI-SIG accepted 1.0a/1.1 FYI methods are:

PLL Loop Bandwidth Testing using clock recovery approach (primary method set up and used for testing at workshops)

Agilent Setup

DCAi 86100C Digital Sampling Oscilloscope
86108A Precision Waveform Analyzer or Agilent 83496B Clock Recovery Module
jBERTN4903B Bit Error Rate Tester or 81150A Pulse Function Arbitrary Noise Generator
Agilent Test Procedure

SyntheSys Research, Inc. Setup

BERTScope PLA
BERTScope Test Procedure

PLL Loop Bandwidth Testing using spectrum analyzer approach (also available at workshops as a backup method)

Agilent Setup

N9020A MXA Signal Analyzer
N5182A MXG Signal Generator
81134A Pulse Generator
Agilent Test Procedure

Tektronix Setup

RSA6000 & AFG3000
Tektronix Test Procedure

PCI Express 2.0 (Released)

PCI Express 2.0 Electrical Test Considerations:

This document provides valuable information for testing electrical signaling of root complex, switch, bridge, end point, add-in peripheral and base board components.

PCI Express 2.0 Electrical Test Procedures: Detailed procedures on how to perform the electrical tests, including scope hookup details.

The following procedures are currently available for Add-In card tests:

The following procedures are currently available for systemboard test:

PCI Express Electrical Test Software: SIGtest version 3.1.9 (Part 1 of 2)
PCI Express Electrical Test Software: SIGtest version 3.1.9 (Part 2 of 2)

Software package that analyzes the captured data. Software runs on Windows XP* This version will be used at the April 7-11, 2008 Compliance Workshop and remains FYI only.
To install, make sure both "SigTest.msi" and "Distfile.cab" are in the same folder then double click "SigTest.msi"

PCI Express Electrical Test Software: New template file for system testing

This package installs the new template file DUAL_PORT_SYS_CON_250.dat into the Sigtest 3.1.9 directory. This template file comprehends the System Board Height ECN for the PCIe CEM Spec 2.0. Updated procedures using this new template file coming soon.

PCI Express Clock Phase Jitter Test Software: ClockTool version 1.3.

Same as for PCI Express 1.1a

PLL Loop Bandwidth Testing:

The PCI-SIG has approved the use of the following two methods for Add-in card PLL loop bandwidth and peaking testing. It is considered a pass if a product passes testing using any one of two methods at a compliance workshop:

PLL Loop Bandwidth Testing using clock recovery method (primary method set up and used for testing at workshops)

Agilent Setup

DCAj 86100C Digital Sampling Oscilloscope
86108A Precision Waveform Analyzer or Agilent 83496B Clock Recovery Module
jBERTN4903B Bit Error Rate Tester or 81150A Pulse Function Arbitrary Noise Generator
Agilent Test Procedure

SyntheSys Research, Inc. Setup

BERTScope PLA
BERTScope Test Procedure

PLL Loop Bandwidth Testing using a Spectrum Analyzer (also available at workshops as a backup method)

For PCI Express 2.0 PLL BW testing using a PCIe 2.0 Compliance Base Board (CBB2) a spectrum analyzer with a minimum bandwidth of 6GHz is required. Also an external clock source must be used that is capable of producing a 100MHz output differentially consistent with the PCIe 2.0 reference clock requirements. The clock source must also support a minimum of 25MHz of modulation bandwidth which may be controlled by an external instrument such as a sine wave signal source.
Agilent Setup

N9020A MXA Signal Analyzer
N5182A MXG Signal Generator
81134A Pulse Generator
Agilent Test Procedure

Tektronix Setup

RSA6000 Spectrum Analyzer
AFG3000 Arbitrary Function Generator
Tektronix Test Procedure

PCI Express Electrical Test Fixtures:

The test procedures require specialized test fixtures available from the PCI-SIG. The Compliance Load Board (CLB) is used for testing platforms. The Compliance Base Board (CBB) is used for testing addin cards. The following links provide copies of the CLB 2.0 Test Fixture User's Document and the CBB 2.0 Test Fixture User's Document. Go to the CLB and CBB ordering instructions for more information.

The following are cables and adapater that are also used at PCI-SIG workshops for electrical testing.

Cable Type	Manufacturer/ Supplier	Part Number
SMA-SMA 1M (OR 36") matched pair cables	Utilized for both system and add-in card testing
	Agilent Technologies, Inc.	N4871-61620
	SyntheSys Research, Inc.	BERTScope PN 0130-314-00
	Tektronix, Inc.	TEK PN 174-4944-01
	W.L. Gore & Associates, Inc.	G9D01D010394-P/M
	Huber+Suhner, Inc.	84077556
	Carlisle Interconnect Technologies, Inc.	174-4944-01 Rev: C
SMP-SMA 4" Cable	Utilized with above low loss cables for system testing
Straight	Rosenberger of North America, LLC	600746 (71L-19K1-32K1-00102C)
Rt. Angle	Rosenberger of North America, LLC	603841 (71L-19K2-32K1-00102)
SMP-SMA Adapter	Utilized with above low loss cables for add-in card testing
	S.M. Electronics, LLC	SM8805

PCI Express Configuration Testing

The PCI Express configuration test is a standalone SW tool that examines the configuration space of devices on add-in cards and checks it for compliance with the spec. The test also exercises some configuration aspects of PCI Express behavior, like individual device resets.

PCI Express 1.0a and 1.1 (Released)

PCI Express Configuration Test Consideration:

This document provides valuable information for testing the configuration mechanisms, registers and features pertaining to root complex, switch, bridge and end point components.

PCI Express Configuration Test Procedures Document:

This document provides detailed procedures on how to perform the configuration tests.

PCI Express Configuration Test Software v.1.3:

Software package that implements the tests. The software runs on Windows XP*. The software must be run on a PCI Express capable machine. Version 1.3 provides two high level test options. One option tests against the 1.1 PCI Express specification. The other option tests to the 1.0a spec and all to ECNs and errata that have been included in the 1.1 spec. With this version, a product passes if it passes each test in either the 1.0a or 1.1 mode, i.e. each feature is implemented correctly to one spec or the other. Review the release notes installed by the software for additional details. Version 1.3 will now be utilized in testing for the integrators list. Updated May 26, 2006.

PCI Express 2.0 (Released)

PCI Express 2.0 Configuration Test Considerations:

This document provides valuable information for testing the configuration mechanisms, registers and features pertaining to root complex, switch, bridge and end point components. - coming soon!

PCI Express Configuration Test Procedures Document:

This document provides detailed procedures on how to perform the configuration tests.

PCI Express Configuration Test Software v.1.4.6:

Software package that implements the tests. The software runs on Windows XP*. The software must be run on a PCI Express 2.0 machine capable of running at 5.0 GT/s. Version 1.4 provides two high level test options. One option tests against the 2.0 PCI Express specification. The other option tests to the 1.1 spec and all to ECN's and errata that have been included in the 2.0 spec. With this version, a product passes if it passes each test in either the 1.1 or 2.0 mode, i.e., each feature is implemented correctly to one spec or the other. Review the release notes installed by the software for additional details. This version will be used at the April 7-11, 2008 Compliance Workshop and remains FYI only. In the future this or some updated version will be required for addition to the Integrators List as a PCIe 2.0 product.

PCI Express Protocol Testing

PCI Express protocol testing consists of tests for link-layer and transaction-layer behavior.

PCI Express 1.0a and 1.1 (Released)

The tests require a specialized Protocol Test Card (PTC) available from Agilent Technologies. The downloadable test software is available on the Agilent PTC webpage. Follow this link to download Agilent PTC Test Software. You can find information for ordering the PTC on the Agilent webpage, by following this link to the Agilent PTC Quick Quote. Currently the test specifications for link and transaction are available.

PCI Express Link-Layer Test Consideration:

This document describes important things to consider when doing link layer testing.

PCI Express Transaction-Layer Test Consideration:

This document describes important things to consider when doing transaction layer testing.

PCI Express Link/Transaction Test Procedures Document:

This document provides detailed procedures on how to perform the Link and Transaction tests.

PCI Express 2.0 (Released)

PCI Express 2.0 Link Layer Test Specification

This document describes the link layer compliance tests

PCI Express 2.0 Transaction Layer Test Specification

This document describes transaction layer compliance tests

The 2.0 link and transaction layer tests require the use of one Protocol Test Card (PTC). The PCI-SIG has approved the use of either of the following PTCs with the PCIe 2.0 compliance testing. It is considered a pass if a product passes testing on either of these PTCs at a compliance workshop.

Agilent System Protocol Test Release 6.10

For product information please visit the Agilent product page
Test Procedure of Agilent Gen 2 PTC for Link Layer and Transaction Layer Testing
Agilent Gen 2 PTC software bundle 2.0.0.1

LeCroy PCI Express 2.0 Protocol Test Card

For product information please visit LeCroy product page
PCIe 2.0 Procedure for LeCroy PTC2 Card
LeCroy Gen 2 PTC software bundle 1.11.11

PCI Express Platform BIOS Testing

The PCI Express Platform BIOS test exercises a platform BIOS to make sure it properly detects and initializes PCI Express devices.

PCI Express 1.0a and 1.1 (Released)

The tests require a specialized test card with solutions available from Agilent (E2969A Protocol Test Card) and Nital. The downloadable test software is available on the Agilent PTC webpage. Follow this link to download Agilent PTC Test Software. You can find information for ordering the PTC on the Agilent webpage, by following this link to the Agilent PTC Quick Quote. Currently the test specification is available.

PCI Express Platform BIOS Test Considerations:

This document describes configuration scenarios that platform BIOSes should properly recognize and configure.

PCI Express System BIOS Test Procedures:

This document provides detailed procedures on how to perform the BIOS tests.

PCI Express Platform BIOS Test Software v.90:

Software package that implements the tests. The software runs on Windows XP*. The software must be run with a specialized test card. Updated October 6, 2004.

PCI Express 2.0 (FYI)

(official testing is currently still done with the 1.1 PTC)

The test requires a specialized test card with solutions available from Agilent E2969B 2.0 PTC and the LeCroy PCIe 2.0 PTC. You can find information for ordering either the PTC on the Agilent and LeCroy webpages by following this link to the Agilent PTC Quick Quote or LeCroy PTC Quick Quote.

BIOS Test Procedure

BIOS Test Software

PCI Express Platform BIOS Test Software v.90

Software package that implements the tests for both PCIe 2.0 PTCs. The The software runs on Windows XP*. The software must be run with a specialized test card.

PCI Express Test Source Code

PCI-SIG^® members who need to download the source code for the PCIe^® Configuration and the PCIe PTC tests may do so after completing the online source code sublicense agreement. Please be sure to read and understand the terms and conditions of the license agreement between your company and PCI-SIG.

Click Through License Agreement to Access PCIECV Source Code
Click Through License Agreement to Access Agilent PCIe 2.0 PTC Source Code
Click Through License Agreement to Access Intel Test Source Code for LeCroy PCIe 2.0 PTC

* "Windows XP" is a trademark, or registered trademark of Microsoft in the United States and/or other countries.

PCI Express® Compliance Test Library

PCI Express Electrical Test Fixtures:

PLL Loop Bandwidth Testing:

PLL Loop Bandwidth Testing:

PCI Express Electrical Test Fixtures:

PCI Express^® Compliance Test Library