 |
PCI Express® Compliance Test Library |
PCI Express Test Source Code
PCI-SIG® members who need to download the source code for the PCIe® Configuration and the PCIe Platform Firmware tests may do so after completing the online source code sublicense agreement. Please be sure to read and understand the terms and conditions of the license agreement between your company and PCI-SIG.
The PCI Express Electrical tests were developed to help verify product compliance to the PCI Express Base Specification(s).
- PCI Express Electrical Test Consideration:
- This document provides valuable information for testing electrical signaling of root complex, switch, bridge, end point, add-in peripheral and base board components. Updated 2/9/2007.
- PCI Express 1.1 Electrical Test Procedures:
- Detailed procedures on how to perform the electrical tests, including scope hookup details. There are currently procedures for an:
PCI Express Electrical Test Fixtures:
The test procedures require specialized test fixtures available from the PCI-SIG. The Compliance Load Board (CLB) is used for testing platforms. The Compliance Base Board (CBB) is used for testing addin cards. Go to the CLB and CBB ordering instructions for more information.
- PCI Express 2.0 Electrical Test Considerations:
- This document provides valuable information for testing electrical signaling of root complex, switch, bridge, end point, add-in peripheral and base board components.
- PCI Express 2.0 Electrical Test Procedures: Detailed procedures on how to perform the electrical tests, including scope hookup details.
- The following procedures are currently available for Add-In card tests:
- The following procedures are currently available for systemboard test:
- PCI Express Electrical Test Software: SIGtest version 3.1.9 (Part 1 of 2)
- PCI Express Electrical Test Software: SIGtest version 3.1.9 (Part 2 of 2)
- Software package that analyzes the captured data. Software runs on Windows XP* This version will be used at the April 7-11, 2008 Compliance Workshop and remains FYI only.
- To install, make sure both "SigTest.msi" and "Distfile.cab" are in the same folder then double click "SigTest.msi"
- PCI Express Clock Phase Jitter Test Software: ClockTool version 1.3.
- Same as for PCI Express 1.1a
PLL Loop Bandwidth Testing:
The PCI-SIG has approved the use of the following two methods for Add-in card PLL loop bandwidth and peaking testing. It is considered a pass if a product passes testing using any one of two methods at a compliance workshop:
- PLL Loop Bandwidth Testing using a Spectrum Analyzer
- For PCI Express 2.0 PLL BW testing using a PCIe 2.0 Compliance Base Board (CBB2) a spectrum analyzer with a minimum bandwidth of 6GHz is required. Also an external clock source must be used that is capable of producing a 100MHz output differentialy consistent with the PCIe 2.0 reference clock requirements. The clock source must also support a minimum of 25MHz of modulation bandwidth which may be controlled by an external instrument such as a sine wave signal source.
- PLL Loop Bandwidth Testing using phase noise measurements
- For PCIe 2.0 PLL BW testing one of the following two sets of equipment using a phase noise and clock recovery approach
- Agilent Setup
- DCAj 86100C Digital Sampling Oscilloscope
- 86108A Precision Waveform Analyzer or Agilent 83496B Clock Recovery Module
- jBERT N4903A Bit Error Rate Tester
- Agilent Test Procedure
- SyntheSys Research, Inc. Setup
PCI Express Electrical Test Fixtures:
The test procedures require specialized test fixtures available from the PCI-SIG. The Compliance Load Board (CLB) is used for testing platforms. The Compliance Base Board (CBB) is used for testing addin cards. The following links provide copies of the CLB 2.0 Test Fixture User's Document and the CBB 2.0 Test Fixture User's Document. Go to the CLB and CBB ordering instructions for more information.
The PCI Express configuration test is a standalone SW tool that examines the configuration space of devices on add-in cards and checks it for compliance with the spec. The test also exercises some configuration aspects of PCI Express behavior, like individual device resets.
- PCI Express Configuration Test Software v.1.3:
- Software package that implements the tests. The software runs on Windows XP*. The software must be run on a PCI Express capable machine. Version 1.3 provides two high level test options. One option tests against the 1.1 PCI Express specification. The other option tests to the 1.0a spec and all to ECNs and errata that have been included in the 1.1 spec. With this version, a product passes if it passes each test in either the 1.0a or 1.1 mode, i.e. each feature is implemented correctly to one spec or the other. Review the release notes installed by the software for additional details. Version 1.3 will now be utilized in testing for the integrators list. Updated May 26, 2006.
- PCI Express 2.0 Configuration Test Considerations:
- This document provides valuable information for testing the configuration mechanisms, registers and features pertaining to root complex, switch, bridge and end point components. - coming soon!
- PCI Express Configuration Test Procedures Document:
- Same was for PCI Express 1.1a
- PCI Express Configuration Test Software v.1.4.5:
- Software package that implements the tests. The software runs on Windows XP*. The software must be run on a PCI Express 2.0 machine capable of running at 5.0 GT/s. Version 1.4 provides two high level test options. One option tests against the 2.0 PCI Express specification. The other option tests to the 1.1 spec and all to ECN's and errata that have been included in the 2.0 spec. With this version, a product passes if it passes each test in either the 1.1 or 2.0 mode, i.e., each feature is implemented correctly to one spec or the other. Review the release notes installed by the software for additional details. This version will be used at the April 7-11, 2008 Compliance Workshop and remains FYI only. In the future this or some updated version will be required for addition to the Integrators List as a PCIe 2.0 product.
PCI Express protocol testing consists of tests for link-layer and transaction-layer behavior.
The tests require a specialized Protocol Test Card (PTC) available from Agilent Technologies. The downloadable test software is available on the Agilent PTC webpage. Follow this link to download Agilent PTC Test Software. You can find information for ordering the PTC on the Agilent webpage, by following this link to the Agilent PTC Quick Quote. Currently the test specifications for link and transaction are available.
- PCI Express 2.0 Link Layer Test Specification - Coming Soon
- This document will describe the link layer compliance tests
- PCI Express 2.0 Transaction Layer Test Specification - Coming Soon
- This document will describe transaction layer compliance tests
The 2.0 link and transaction layer tests require the use of one Protocol Test Card (PTC). The PCI-SIG has approved the use of either of the following PTCs with the PCIe 2.0 compliance testing. It is considered a pass if a product passes testing on either of these PTCs at a compliance workshop.
- Agilent System Protocol Test Release 6.10
- For product information please visit the Agilent product page
- Procedures coming soon
- Software coming soon
- LeCroy PCI Express 2.0 Protocol Test Card
- For product information please visit LeCroy product page
- Procedures coming soon
- Software coming soon
The PCI Express Platform BIOS test exercises a platform BIOS to make sure it properly detects and initializes PCI Express devices.
The tests require a specialized test card with solutions available from Agilent (E2969A Protocol Test Card) and Nital. The downloadable test software is available on the Agilent PTC webpage. Follow this link to download Agilent PTC Test Software. You can find information for ordering the PTC on the Agilent webpage, by following this link to the Agilent PTC Quick Quote. Currently the test specification is available.
* "Windows XP" is a trademark, or registered trademark of Microsoft in the United States and/or other countries.
