 |
PCI Express® Compliance Test Library
|
The PCI Express Electrical tests were developed to help verify product compliance to the PCI Express Base Specification (s).
Please Note: Effective January 1, 2013 PCI-SIG no longer tests PCI Express 1.0a and 1.1 devices at Compliance Workshops (see announcement to members on 10/16/2012).
- PCI Express Electrical Test Consideration:
- This document provides valuable information for testing electrical signaling of root complex, switch, bridge, end point, add-in peripheral and base board components. Updated 2/9/2007.
- PCI Express 1.1 Electrical Test Procedures:
PCI Express Electrical Test Fixtures:
The test procedures require specialized test fixtures available from the PCI-SIG. The Compliance Load Board (CLB) is used for testing platforms. The Compliance Base Board (CBB) is used for testing addin cards. Go to the CLB and CBB ordering instructions for more information.
PLL Loop Bandwidth Testing:
The PCI-SIG offers PLL Loop Bandwidth and peaking testing as FYI data for 1.0a/1.1 devices. The PCI-SIG accepted 1.0a/1.1 FYI methods are:
- PLL Loop Bandwidth Testing using clock recovery approach (primary method set up and used for testing at workshops)
- Agilent Setup
- DCAi 86100C Digital Sampling Oscilloscope
- 86108A Precision Waveform Analyzer or Agilent 83496B Clock Recovery Module
- jBERTN4903B Bit Error Rate Tester or 81150A Pulse Function Arbitrary Noise Generator
- Agilent Test Procedure
-
Tektronix Setup
- PLL Loop Bandwidth Testing using spectrum analyzer approach (also available at workshops as a backup method)
- Agilent Setup
- Tektronix Setup
- PCI Express 2.0 Electrical Test Considerations:
- This document provides valuable information for testing electrical signaling of root complex, switch, bridge, end point, add-in peripheral and base board components.
- PCI Express 2.0 Electrical Test Procedures: Detailed procedures on how to perform the electrical tests, including scope hookup details.
- The following procedures are currently available for Add-In card tests:
- The following procedures are currently available for systemboard test:
- Please note: PCI Express Electrical Test Software, SIGtest version 3.2.0, will be used for PCI Express 2.0 testing at the August 13-16, 2013 Compliance Workshop and beyond. This allows one version of the SIGtest electrical test tool to be used for PCI Express 2.0 and PCI Express 3.0 electrical testing. Please see the “PCI Express 3.0 (Released)” section below for instructions and access to download SIGtest version 3.2.0 and additional templates listed for SIGtest version 3.2.0.
- PCI Express Electrical Test Software: SIGtest version 3.1.9 (Part 1 of 2)
- PCI Express Electrical Test Software: SIGtest version 3.1.9 (Part 2 of 2)
- Software package that analyzes the captured data. Software runs on Windows XP* This version will be used at the April 7-11, 2008 Compliance Workshop and remains FYI only.
- To install, make sure both "SigTest.msi" and "Distfile.cab" are in the same folder then double click "SigTest.msi"
- PCI Express Electrical Test Software: New template file for system testing
- This package installs the new template file DUAL_PORT_SYS_CON_250.dat into the Sigtest 3.1.9 directory. This template file comprehends the System Board Height ECN for the PCIe CEM Spec 2.0. Updated procedures using this new template file coming soon.
- PCI Express Clock Phase Jitter Test Software: ClockTool version 1.3.
- Same as for PCI Express 1.1a
PLL Loop Bandwidth Testing:
The PCI-SIG has approved the use of the following two methods for Add-in card PLL loop bandwidth and peaking testing. It is considered a pass if a product passes testing using any one of two methods at a compliance workshop:
- PLL Loop Bandwidth Testing using clock recovery method (primary method set up and used for testing at workshops)
- Agilent Setup
- DCAj 86100C Digital Sampling Oscilloscope
- 86108A Precision Waveform Analyzer or Agilent 83496B Clock Recovery Module
- jBERTN4903B Bit Error Rate Tester or 81150A Pulse Function Arbitrary Noise Generator
- Agilent Test Procedure
-
Tektronix Setup
- PLL Loop Bandwidth Testing using a Spectrum Analyzer (also available at workshops as a backup method)
- For PCI Express 2.0 PLL BW testing using a PCIe 2.0 Compliance Base Board (CBB2) a spectrum analyzer with a minimum bandwidth of 6GHz is required. Also an external clock source must be used that is capable of producing a 100MHz output differentially consistent with the PCIe 2.0 reference clock requirements. The clock source must also support a minimum of 25MHz of modulation bandwidth which may be controlled by an external instrument such as a sine wave signal source.
- Agilent Setup
- Tektronix Setup
PCI Express Electrical Test Fixtures:
The test procedures require specialized test fixtures available from the PCI-SIG. The Compliance Load Board (CLB) is used for testing platforms. The Compliance Base Board (CBB) is used for testing addin cards. The following links provide copies of the CLB 2.0 Test Fixture User's Document and the CBB 2.0 Test Fixture User's Document. Go to the CLB and CBB ordering instructions for more information.
The following are cables and adapters that are also used at PCI-SIG workshops for electrical testing.
| Cable Type |
Manufacturer/ Supplier |
Part Number |
|
SMA-SMA 1M (OR 36") matched pair cables
|
Utilized for both system and add-in card testing |
|
| |
Agilent Technologies, Inc. |
N2812A |
| |
Tektronix, Inc. |
TEK PN 174577100 |
| |
Huber+Suhner, Inc. |
84077556 |
| |
TeleDyne Storm Microwave |
094-10025-001 |
| SMP-SMA 4" Cable |
Utilized with above low loss cables for system testing |
|
|
Straight
|
Rosenberger of North America, LLC |
600746 (71L-19K1-32K1-00102C) |
|
Rt. Angle
|
Rosenberger of North America, LLC |
603841 (71L-19K2-32K1-00102D) |
| SMP-SMA Adapter |
Utilized with above low loss cables for add-in card testing |
|
| |
Fairview Microwave |
SM8805 (19K132-K00D3) |
| SMA-SMP 1M (or 36") matched pair cables |
Clock signal cable used with CLB for system testing |
|
| |
Rosenberger of North America, LLC |
71L-19K1-32S1-01000D |
| |
Rosenberger of North America, LLC |
71M-19K1-32S1-01000A |
| SMP-SMP jumper cable |
Used with CLB3 & CBB3 test fixtures |
|
| |
Rosenberger of North America, LLC |
71L-19K2-19K2-00305C |
| SMP Terminator |
Used with CLB & CBB test fixtures |
|
| |
Fairview Microwave |
ST1847 or ST2645 (19K15R-001E4) |
Transmitter Testing for PCIe 3.0:
- PCI Express 3.0 Electrical Test Procedures: Detailed procedures on how to perform the electrical tests, including scope hookup details for transmitter testing
- The following procedures are currently available for Add-In card tests:
- The following procedures are currently available for system board test:
- PCI Express Electrical Test Software: SIGTEST version 3.1.71
Receiver Jitter Tolerance Testing for PCIe 3.0:
The PCI-SIG has approved the use of the following method for receiver jitter tolerance testing of add-in card and system board testing. It is considered a pass if a PCIe 3.0 capable devices passes on either of these systems at a compliance workshop.
Tx/Rx Link Equalization Testing for PCIe 3.0:
The PCI-SIG will require testing Tx/Rx link equalization based on sections 2.3, 2.4, 2.7, 2.10 and 2.11 of the PCI Express® Architecture PHY Test Specification Revision 3.0. The following test procedure has been approved and will be be available at compliance workshops for pass/fail testing.
PLL Loop Bandwidth Testing for PCIe 3.0:
The PCI-SIG has approved the use of the following method for Add-in card PLL loop bandwidth and peaking testing. It is considered a pass if a PCIe 3.0 capable device passes on this test system at a compliance workshop
- Agilent Setup
- DCAj 86100C Digital Sampling Oscilloscope
- 86108A Precision Waveform Analyzer or Agilent 83496B Clock Recovery Module
- J-BERT N4903B High-Performance Serial BERT, Agilent 81150A or 81160A Pulse Function Arbitrary Noise Generator
- Agilent Test Procedure
Differential Impedance Testing (FYI):
The PCI-SIG has approved the use of the following method for Add-in card (endpoint) and motherboard (root complex) product implementations as well as measuring differential impedance of PCI Express test fixtures. This test procedure is provided as FYI and is not required in order to qualify for the PCI-SIG’s integrator’s list
- Agilent Setup
- E5071C Network Analyzer (Must include option TDR and one of the following options:480/485/4D5/4K5.)
- Agilent Test Procedure
PCI Express Electrical Test Fixtures:
The test procedures require specialized test fixtures available from the PCI-SIG. The Compliance Load Board (CLB) is used for testing platforms. The Compliance Base Board (CBB) is used for testing addin cards. The following links provide copies of the draft CLB 3.0 Test Fixture User's Document and the CBB 3.0 Test Fixture User's Document. Go to the CLB and CBB ordering instructions for more information.
PCI Express Electrical Test Software:
SIGtest version 3.2.0
Software package that analyzes the captured data. Software runs on Windows XP/Windows 7. This version will be used at the August 21-24, 2012 Compliance Workshop. This version will be used for all PCI Express 2.0 and PCI Express 3.0 electrical testing at the August 13-16, 2013 Compliance Workshop and beyond.
The PCI Express configuration test is a standalone SW tool that examines the configuration space of devices on add-in cards and checks it for compliance with the spec. The test also exercises some configuration aspects of PCI Express behavior, like individual device resets.
- PCI Express 2.0 Configuration Test Considerations:
- This document provides valuable information for testing the configuration mechanisms, registers and features pertaining to root complex, switch, bridge and end point components. - coming soon!
- PCI Express 2.1 Configuration Test :
PCIECV 1.5.1.9
Click this link to install PCIECV 1.5.1.9
PCI Express protocol testing consists of tests for link-layer and transaction-layer behavior.
Please Note: Effective January 1, 2013 PCI-SIG no longer tests PCI Express 1.0a and 1.1 devices at Compliance Workshops (see announcement to members on 10/16/2012).
The tests require a specialized Protocol Test Card (PTC) available from Agilent Technologies. The downloadable test software is available on the Agilent PTC webpage. Follow this link to download Agilent PTC Test Software. You can find information for ordering the PTC on the Agilent webpage, by following this link to the Agilent PTC Quick Quote. Currently the test specifications for link and transaction are available.
The 2.0 link and transaction layer tests require the use of one Protocol Test Card (PTC). The PCI-SIG has approved the use of either of the following PTCs with the PCIe 2.0 compliance testing. It is considered a pass if a product passes testing on either of these PTCs at a compliance workshop.
- Agilent System Protocol Test Release 6.10
- LeCroy PCI Express 2.0 Protocol Test Card
- PCI Express 3.0 Link and Transaction Layer Test Specification
- This document describes the link layer compliance tests
The PCI Express 3.0 link and transaction layer tests require the use of one Protocol Test Card (PTC). The PCI-SIG has approved the use of the Agilent U4305A Protocol Test Card for PCIe 3.0 compliance testing. It is considered a pass if a product passes all tests on this system at a compliance workshop.
- Agilent System Protocol Test Release 8.6
- Agilent Setup
5GT/s De-emphasis Request During Speed Change Testing (required test for PCIe 3.0 devices)
The PCI-SIG has approved the use of the following two methods for 5GT/s De-emphasis request during speed change testing. It is considered a pass if a product passes testing using any one of the two methods at a compliance workshop.
The PCI Express Platform BIOS test exercises a platform BIOS to make sure it properly detects and initializes PCI Express devices.
Please Note: Effective January 1, 2013 PCI-SIG no longer tests PCI Express 1.0a and 1.1 devices at Compliance Workshops (see announcement to members on 10/16/2012).
The tests require a specialized test card with solutions available from Agilent (E2969A Protocol Test Card) and Nital. The downloadable test software is available on the Agilent PTC webpage. Follow this link to download Agilent PTC Test Software. You can find information for ordering the PTC on the Agilent webpage, by following this link to the Agilent PTC Quick Quote. Currently the test specification is available.
The test requires a specialized test card to run. Official testin at compliance workshops is performed using Agilent U4305A Protocol Test Card. Additional informaiton is available from www.agilent.com/find/U4305A
- BIOS Test Procedure
- BIOS Test Software
Additional FYI only test solutions are available using the Agilent E2969B 2.0 PTC and the LeCroy PCIe 2.0 PTC. You can find information for ordering either the PTC on the Agilent and LeCroy webpages by following this link to the Agilent PTC Quick Quote or LeCroy PTC Quick Quote.
- BIOS Test Procedure
- BIOS Test Software
The PCI-SIG has approved the use of the Agilent U4305A Protocol Test Card for PCIe 3.0 compliance testing. It is considered a pass if a product passes all tests on this system at a compliance workshop.
- BIOS Test Procedure
- BIOS Test Software – The software is comprised of 3 components
PCI Express Test Source Code
PCI-SIG® members who need to download the source code for the PCIe® Configuration and the PCIe PTC tests may do so after completing the online source code sublicense agreement. Please be sure to read and understand the terms and conditions of the license agreement between your company and PCI-SIG.
